Vector processing is a well known form of data processing involving arrays or vector operands. The terms "array" and "vector" are synonymous and are used in a mutually interchangeable manner hereinafter. A "vector operand" is a set of ordered or related data items or vector elements. "Vector processing" generally involves performing the same operation on each element of the vector operand. In one common prior art method of vector processing, vector operands are stored in a main store or bulk store. Execution of a user instruction causes a storage-to-storage operation to be performed wherein one or more vector operands are inputted from the main or bulk store into a processing unit and the results of processing are then stored back in the main or bulk store.
Because the speed of operation of a processing unit is generally considerably faster than the speed of data transfer to and from a main or bulk store, a high speed buffer or cache may be connected between the bulk store and the processing unit. The operation of such buffer is normally transparent to the user during storage-to-storage operations. That is, the operations are performed automatically and the user has no control over usage of the buffer. Such control is normally accomplished by use of a microprogram and is predetermined for each of the different vector processing operations in a given system.
The IBM 3838 Array Processor had, and U.S. Pat. Nos. 4,041,461--Kratz et al and 4,149,243 Wallis, both assigned to the Assignee of the present invention, describe, an architecture in which a buffer called a "working store" is connected between a processing unit and a main or bulk store. Such working store includes two sections operable in an overlapped fashion whereby as one section works with a processing unit to input operands into the unit and to receive the processing results, the other section works with the bulk store to output results from prior processing and to receive new operands to be processed at the conclusion of the current processing. A storage controller controls the transfer of data between the working store and the bulk store. From the user viewpoint, all operations are storage-to-storage and the operation of the working store is transparent to the user.
The above architectures were oriented to processing relatively long vector operands such as might be encountered in signal analysis and processing seismic signals, where an average size vector operand has 1500 to 2000 elements. For processing, each long vector operand was broken down into segments containing a lesser number of elements, e.g., 256 elements. The last segment in an operand might contain less than the total number of elements to fill a segment and was processed as a "remainder". For vector operands having a number of elements less than the number of elements in a segment, such short operands were processed in nearly the same manner as a remainder. Each segment was assigned to a fixed or predetermined area of the working store, dependent on the type of operation and how many vector operands were involved.
The use of vector registers is also known in the prior art. The IBM 2938 Array Processor included two vector registers known as the X and Y buffers. Each buffer was relatively small and held thirty-two vector elements. All vector operations were performed via storage-to-storage processing where the generally long vector operands were broken down into thirty-two element segments each of which was temporarily stored in one of the buffers as an intermediate step in the storage-to-storage processing. For example, when two vector operands were added element-by-element, one vector operand segment was stored in the X buffer and another vector operand segment was stored in the Y buffer. Pairs of elements, one from each buffer, would then be added to produce a result element that was stored back in the X buffer to overlay the original elements therein, and the resultant vector operand segment would then be transferred to main storage. The use of such vector registers was completely transparent to the user.
U.S. Pat. No. 4,128,880, Cray, discloses a general purpose data processing system having eight vector registers and related functional units which adapt the system for array processing. The vector registers each store up to sixty-four vector elements and are available for use by the user in somewhat the same manner as are general purpose registers.